Tiling is a key loop transformation for effective use of parallelism on multi-core processors. Tiling enables coarse-grained parallel execution of loops to reduce synchronization overheads and enhances spatial and temporal locality to reduce data access costs. Recent advances in the so-called polyhedral compiler model have enabled the development of effective approaches to tiled code generation for affine loop computations. In this talk, we will describe the use of a combination of compile-time and runtime approaches to optimize imperfectly nested affine loops for execution on multicore processors.

P. (Saday) Sadayappan is a Professor of Computer Science and Engineering at the Ohio State University. His research centers around programming models, compilers and runtime systems for parallel computing, with special emphasis on high-performance scientific computing.