Seminars & Colloquia
University of Virginia
"Breaking the ISA Barrier in Modern Computing"
Friday March 29, 2019 11:00 AM
Location: 3211, EB2 NCSU Centennial Campus
(Visitor parking instructions)
This talk is part of the
System Research Seminar series
Abstract: In recent years, the computing landscape has witnessed a shift towards hardware specialization in response to the rapidly evolving software, changing market risks, rising security threats, and technological limitations. Modern architectures allow us to instantly configure hardware parameters such as frequency, voltage, and cache properties to increase efficiency on the mere click of a button. Yet the choice of the machine language or Instruction Set Architecture (ISA) is typically constrained by a decision made when our phone, laptop, or server was purchased. And yet, the choice of ISA can have a significant impact on the execution efficiency of a program. In this talk, I will describe my research that now allows us to make that choice, not just individually for each program, but every few milliseconds within the execution of a single program.
More specifically, I will describe a compiler and runtime strategy for swift and seamless process migration across diverse ISAs, and further showcase results from a massive design space exploration that demonstrates the performance and energy efficiency benefits of multi-ISA and composite-ISA heterogeneous architectures. In addition, I will also discuss the security potential of multi-ISA architectures to thwart several evasive variants of the notorious Return-Oriented Programming (ROP) attack. Finally, I will briefly introduce several underexploited levers in the hardware/software interface that have the potential to transform the computing landscape for greater gains in performance, energy efficiency, and security.
Short Bio: Ashish Venkat is an Assistant Professor in the Department of Computer Science at the University of Virginia, where he joined after obtaining a Ph.D. from UC San Diego in 2018. His research interests are in computer architecture and compilers, especially in instruction set design, processor microarchitecture, binary translation, code generation, and their intersection with computer security and machine learning. His work on heterogeneous architectures has been published at top-tier venues such as ISCA, ASPLOS, and HPCA. His work has been featured in the IEEE Micro Top Picks Issue of 2019 and was recognized as the runner-up of the HPCA Best Paper Award in 2019. His dissertation research has been successfully ported and transferred to the Cloud Platforms division of the IBM Haifa Research Lab.
Host: Hung-Wei Tseng, CSC
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